Xilinx Virtex®-7 FPGA VC7203 Characterization Kit provides the hardware environment for characterizing and evaluating 28 GTX (12.5Gbps) transceivers of the onboard Virtex-7 V485T FPGA. The VC7203 allows evaluation of the Integrated Bit Error Ratio Test (IBERT) demonstration using either the Vivado™ or ISE® design suites. Each GTX Quad and its associated reference clock are routed from the FPGA to a connector pad which is designed to interface with a Samtec BullsEye connector. A cable enabled with a BullsEye connector and 10 standard SMAs allows users to connect to a broad range of evaluation platforms, from backplanes and optical evaluation boards to high-speed test equipment. Each BullsEye connector handles a full GTX Quad, four transmit/receive pairs as well as the two independent reference clocks, enabling the highest level of flexibility in testing custom applications.
Hardware environment for characterizing and evaluating 28 GTX (12.5Gbps) transceivers on the Virtex-7 V485T FPGAsHardware, design tools, IP, and pre-verified reference designsIntegrated Bit Error Ratio Test (IBERT) reference designBullsEye connector supporting a full GTX Quad, with four transmit/receive pairs
One SD card containing the IBERT demonstration designsOne Samtec BullsEye cableEight SMA female-to-female (F-F) adaptersSix 50Ω SMA terminatorsGTX transceiver power supply module (installed on board)SuperClock-2 module, Rev 1.0 (installed on board)